1. Field of the Invention
This invention relates generally to a method for forming metal electrodes on a semiconductor device and, more particularly, to a method for forming closely spaced metal electrodes electrically connected to different layers of a semiconductor device that provides reliable and reproducible vertical and horizontal separation of the electrodes.
2. Discussion of the Related Art
Semiconductor device performance has been continually improving. In order for semiconductor devices to operate at increasing speeds, the size of the devices has been becoming smaller. As the devices become smaller, the spacing between electrodes connected to different regions of the device needs to be closer together. Additionally, in order to realize higher device performance, the contact resistance between an electrode and the region of the device the electrode contacts must be minimized. An electrode metalization process which would provide contact to the entire surface area of a semiconductor region would result in a minimum contact resistance to that region.
Although it is relatively straightforward to provide complete metal electrode coverage to a single semiconductor region, it is much more difficult to metalize adjacent semiconductor regions with complete or nearly complete metal coverage. Clearly, some minimum space between metal electrodes contacting different semiconductor regions is required to prevent electrical shorts. It is therefore difficult to achieve minimum spacing between two metal electrodes with a reliable, reproducible process. Consequently, device performance is limited by the ability of metalization processes in achieving minimum electrode spacing.
Known processes of forming closely spaced metal electrodes in high performance semiconductor devices typically include using a recess of an etched top layer of the semiconductor device to provide the spacing between adjacent contact metal layers forming electrodes for two semiconductor regions. For example, the emitter metal of a heterojunction bipolar transistor (HBT) could be used as a mask to etch the emitter region of the HBT, thus forming a recess for a self-aligned base metalization. If the top layer of a semiconductor device is thin, or the metal contacting an adjacent semiconductor layer, such as the base of an HBT, needs to be of a comparable thickness to that of the emitter region, the spacing between the two metal layers forming the electrodes may be very small resulting in the formation of metal electrodes which are likely to cause short circuits. Increasing the thickness of the top semiconductor layer would provide better separation of the electrodes, but might increase the parasitic resistance of this layer, and thus will reduce the etch reproducibility for forming narrow (sub micron) top semiconductor layer widths.
Further, other known processes of forming closely spaced metal electrodes in high performance semiconductor devices that use dielectric spacer technology are not readily effective with certain contact metals, such as gold, that are difficult to etch by the techniques that are compatible with dielectric spacer technology.
What is needed is a reliable and reproducible process for forming metal electrodes in a high performance semiconductor device which produces minimum separation between an electrode of one semiconductor layer and an electrode for adjacent semiconductor layers that is independent of the semiconductor layer thicknesses or of the metals being used to contact the semiconductor layers. It is therefore an object of the present invention to provide such a process.